[zeromq-dev] max_app_threads = 512

Martin Sustrik sustrik at 250bpm.com
Wed Jun 16 13:37:49 CEST 2010


> First off, let me apologize for asking newbie questions. SMP has  
> really only been a serious subject for me for the last four weeks.  My  
> graduate work predated the RAM model (80's), although I'm a EE so I  
> understand the pipelining tradeoffs and store ordering "non guarantees".
> As near as I can tell it should be straightforward to build a 1R/1W  
> lockless pipe using barriers (certainly you can do a circular buffer  
> with a count, so this should extend to a queue, although it may  
> require getting efficiencies using an unrolled list, i.e. one lock per  
> allocation of N blocks).  I haven't had the time to dig into your  
> ypipes yet, which may be doing that.
> Am I correct here?

Yes, you are.

> Intuitively I think it should be possible to build a zero barrier 1R/ 
> 1R lockless queue leveraging CPU affinity and cache alignment tricks  
> to preserve store ordering (essentially using memory as an inter- 
> processor messaging platform), but it seems pretty exotic, and I've  
> got to study the cache update guarantees for modern architectures.

1R/1R? Can you be more specific?

> I've been reading the web pubs, but probably have to buy an actual  
> book (!) to understand the basics of the RAM model (tall RAM  
> assumption, etc., etc.)  Recommendations would be appreciated.

The whole area is poorly documented. I have no real recommendation for 
you :|


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