[zeromq-dev] max_app_threads = 512
sustrik at 250bpm.com
Wed Jun 16 15:48:00 CEST 2010
> Actually, I want to do this without barrier ops, ideally I'd have
> single cycle 128-bit wide load/store from/to Lx processor cache.
> Presumably QPI transports a line at a time between CPUs, so I just
> have to be properly aligned.
> If I've only got a 64-bit wide internal bus, I'll do some bit munching
> to get what I need out of the address bits :-)
> I'll look around at the intel books after my current crunch is over (a
> few days).
If you have some time have a look at ypipe_t as well. It works but my
it's pretty creaky when it comes to cache synchronisation details.
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